Xiuyuan Bi,: search on Z-Library

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1

[IEEE 2009 IEEE 8th International Conference on ASIC (ASICON) - Changsha, Hunan, China (2009.10.20-2009.10.23)] 2009 IEEE 8th International Conference on ASIC - Design and FPGA implementation of 3DES against Power Analysis Attacks for IC bankcard

Xiuyuan Bi,, Liji Wu,, Guoqiang Bai,

Year:

2009

Language:

english

File:

PDF, 4.46 MB

english, 2009

2

STT-RAM Cell Design Considering CMOS and MTJ Temperature Dependence

Bi, Xiuyuan, Li, Hai, Wang, Xiaobin

Journal:

IEEE Transactions on Magnetics

Year:

2012

Language:

english

File:

PDF, 767 KB

english, 2012

3

[IEEE 2012 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Amherst, MA, USA (2012.08.19-2012.08.21)] 2012 IEEE Computer Society Annual Symposium on VLSI - Analysis and Optimization of Thermal Effect on STT-RAM Based 3-D Stacked Cache Design

Bi, Xiuyuan, Li, Hai, Kim, Jae-Joon

Year:

2012

Language:

english

File:

PDF, 473 KB

english, 2012

4

[IEEE 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology (ICSICT) - Xi'an (2012.10.29-2012.11.1)] 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology - Spintronic devices: From memory to memristor

Hai Li,, Zhenyu Sun,, Xiuyuan Bi,, Wysocki, B.

Year:

2012

Language:

english

File:

PDF, 444 KB

english, 2012

5

STT-RAM Cache Hierarchy With Multiretention MTJ Designs

Sun, Zhenyu, Bi, Xiuyuan, Li, Hai, Wong, Weng-Fai, Zhu, Xiaochun

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2014

Language:

english

File:

PDF, 2.88 MB

english, 2014

6

[ACM Press the 44th Annual IEEE/ACM International Symposium - Porto Alegre, Brazil (2011.12.03-2011.12.07)] Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture - MICRO-44 '11 - Multi retention level STT-RAM cache designs with a dynamic refresh scheme

Sun, Zhenyu, Bi, Xiuyuan, Li, Hai (Helen), Wong, Weng-Fai, Ong, Zhong-Liang, Zhu, Xiaochun, Wu, Wenqing

Year:

2011

Language:

english

File:

PDF, 1.01 MB

english, 2011

7

[ACM Press the International Conference - San Jose, California (2012.11.05-2012.11.08)] Proceedings of the International Conference on Computer-Aided Design - ICCAD '12 - Probabilistic design methodology to improve run-time stability and performance of STT-RAM caches

Bi, Xiuyuan, Sun, Zhenyu, Li, Hai, Wu, Wenqing

Year:

2012

Language:

english

File:

PDF, 1.68 MB

english, 2012

8

Array Organization and Data Management Exploration in Racetrack Memory

Sun, Zhenyu, Bi, Xiuyuan, Wu, Wenqing, Yoo, Sungjoo, Li, Hai

Journal:

IEEE Transactions on Computers

Year:

2014

Language:

english

File:

PDF, 2.02 MB

english, 2014

9

[IEEE 2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) - Brooklyn, NY, USA (2013.07.15-2013.07.17)] 2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) - A pseudo-weighted sensing scheme for memristor based cross-point memory

Chen, Zhijie, Zhang, Lu, Bi, Xiuyuan, Li, Hai

Year:

2013

Language:

english

File:

PDF, 160 KB

english, 2013

10

[IEEE Conference Publications Design Automation and Test in Europe - Grenoble, France (2013.03.18-2013.03.22)] Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013 - STT-RAM Designs Supporting Dual-Port Accesses

Bi, Xiuyuan, Weldon, Mohamed Anis, Li, Hai

Year:

2013

Language:

english

File:

PDF, 147 KB

english, 2013

11

[IEEE 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - San Jose, CA, USA (2013.11.18-2013.11.21)] 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - Unleashing the potential of MLC STT-RAM caches

Bi, Xiuyuan, Mao, Mengjie, Wang, Danghui, Li, Hai

Year:

2013

Language:

english

File:

PDF, 4.44 MB

english, 2013

12

[IEEE 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE 2012) - Dresden (2012.03.12-2012.03.16)] 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Spintronic memristor based temperature sensor design with CMOS current reference

Xiuyuan Bi,, Chao Zhang,, Hai Li,, Yiran Chen,, Pino, R. E.

Year:

2012

Language:

english

File:

PDF, 613 KB

english, 2012

13

[ACM Press the 2014 international symposium - La Jolla, California, USA (2014.08.11-2014.08.13)] Proceedings of the 2014 international symposium on Low power electronics and design - ISLPED '14 - Design exploration of racetrack lower-level caches

Sun, Zhenyu, Bi, Xiuyuan, Jones, Alex K., Li, Hai

Year:

2014

Language:

english

File:

PDF, 801 KB

english, 2014

14

[ACM Press the 2012 ACM/IEEE international symposium - Redondo Beach, California, USA (2012.07.30-2012.08.01)] Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design - ISLPED '12 - Process variation aware data management for STT-RAM cache design

Sun, Zhenyu, Bi, Xiuyuan, Li, Hai

Year:

2012

Language:

english

File:

PDF, 824 KB

english, 2012

15

[IEEE 2015 20th Asia and South Pacific Design Automation Conference (ASP-DAC) - Chiba, Japan (2015.1.19-2015.1.22)] The 20th Asia and South Pacific Design Automation Conference - An efficient STT-RAM-based register file in GPU architectures

Liu, Xiaoxiao, Mao, Mengjie, Bi, Xiuyuan, Li, Hai, Chen, Yiran

Year:

2015

Language:

english

File:

PDF, 1.12 MB

english, 2015

16

[IEEE 2014 32nd IEEE International Conference on Computer Design (ICCD) - Seoul, South Korea (2014.10.19-2014.10.22)] 2014 IEEE 32nd International Conference on Computer Design (ICCD) - Optimizing MLC-based STT-RAM caches by dynamic block size reconfiguration

Wang, Jianxing, Roy, Pooja, Wong, Weng-Fai, Bi, Xiuyuan, Li, Hai

Year:

2014

Language:

english

File:

PDF, 1.28 MB

english, 2014

17

[IEEE 2015 28th IEEE International System-on-Chip Conference (SOCC) - Beijing, China (2015.9.8-2015.9.11)] 2015 28th IEEE International System-on-Chip Conference (SOCC) - The evolutionary spintronic technologies and their usage in high performance computing

Li, Hai Helen, Bi, Xiuyuan, Sun, Zhenyu

Year:

2015

Language:

english

File:

PDF, 663 KB

english, 2015

18

Cross-Layer Optimization for Multilevel Cell STT-RAM Caches

Bi, Xiuyuan, Mao, Mengjie, Wang, Danghui, Li, Hai

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2017

Language:

english

File:

PDF, 2.87 MB

english, 2017

19

Enhanced biodegradation of atrazine by Arthrobacter sp. DNS10 during co-culture with a phosphorus solubilizing bacteria: Enterobacter sp. P1

Jiang, Zhao, Zhang, Xiuyuan, Wang, Ziyi, Cao, Bo, Deng, Shijie, Bi, Mingchun, Zhang, Ying

Journal:

Ecotoxicology and Environmental Safety

Year:

2019

File:

PDF, 1.52 MB

2019

20

[IEEE 2019 IEEE International Conference on Smart Internet of Things (SmartIoT) - Tianjin, China (2019.8.9-2019.8.11)] 2019 IEEE International Conference on Smart Internet of Things (SmartIoT) - Budget-Aware Equilibrium Offloading for Mobile Edge Computing

Yang, Xiuyuan, Bi, Ran

Year:

2019

Language:

english

File:

PDF, 175 KB

english, 2019